Linear Technology's recently introduced LTC4300 chip buffers I 2 C clock and data lines to and from a hot-swappable card. This task is difficult because the IC must work bidirectionally, meaning that ...

SANTA CRUZ, Calif. — Startup Solido Design Automation Inc. this week (June 26) is announcing its mission to provide “transistor-level design enhancement solutions” for analog/mixed-signal design, as ...

Abstract— Today’s on-chip Analog/Mixed-Signal and RF (A/RF) systems have reached a limit of size and complexity where transistor-level SPICE and FastSPICE simulation approaches cannot deliver a ...

Technologies that had become specialist tools are moving back into mainstream usage; shift left is not just about doing things earlier in the flow. A few decades ago, all designers did ...

Berkeley Design Automation has announced the closed-loop noise analysis of fractional-N phase-locked loops (PLLs) at the transistor level. The company is a provider of Precision Circuit Analysis ...

Cadence is claiming up to 3x transient simulation performance for its latest transistor-level circuit simulator, compared with its previous offering. Called Spectre FX Simulator, it is the next ...

With the size of semiconductor transistors decreasing and chip complexity increasing exponentially, semiconductor test has become essential to ensuring that only high-quality products go to market.

Designers rely on the accuracy of Process Design Kits (PDK¡¦s) for their IC designs. This paper describes independent verification of the PDK accuracy using a low-cost Die Level Process Monitor (DLPM) ...

SANTA CLARA, Calif.--(BUSINESS WIRE)--July 24, 2006--Magma(R) Design Automation Inc. (Nasdaq:LAVA), a provider of semiconductor design software, today announced the availability of FineSim(R) Pro, the ...

Though growth rates in some product categories have slowed, doubling of transistors per chip every two years remains a guideline that the industry continues to follow, days IC Insights. IC Insights’ ...